The present invention relates to a multilayer ceramic wiring board especially for use with various electronic parts, which reduces an electric resistance and prevents the generation of cracks in a conductor portion disposed at upper and lower layer portions of the ceramic board.
A known multilayer ceramic wiring board is constructed of a ceramic board formed by laminating a plurality of green sheets and burning a laminate of the green sheets and a plurality of conductors formed of a ceramic material and a conductive material and provided in a plurality of through-holes formed in the ceramic board (see Japanese Patent Laid-open Publication No. 60-53098, for example).
In the above conventional multilayer ceramic wiring board, a content ratio of the ceramic material in all the conductors is the same.
Accordingly, in the case where the content ratio of the ceramic material is high, an electric resistance is high. On the contrary, in the case where the content ratio of the ceramic material is low, an internal stress due to a large difference in coefficient of thermal expansion between the ceramic board and the conductors is generated to cause the generation of cracks on the surface of the ceramic board around the conductors. In recent years, high-speed operation and high integration in electronic circuits have been demanded. Accordingly, the requirement of high-density wiring in the multilayer wiring board has been increased. As a result, a pitch of the through-holes is necessarily reduced to cause distortion of the wiring board. Thus, the tendency of the generation of cracks on the surface of the wiring board around the conductors is further increased. Further, when a diameter of the conductors is reduced so as to increase the number of the conductors to be provided in the wiring board, the electric resistance becomes high.